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#riscv search results

antonblanchard's profile picture. Fellow @tenstorrent. Opinions are my own.
Anton Blanchard
 @antonblanchard
Nov 7

Green screen #DOOM ! This was my favourite bug we found running DOOM on the @Tenstorrent Ascalon #RISCV CPU in pre silicon testing. We initially thought it was a chip RTL issue, but it turned out to be both a gcc bug gcc.gnu.org/bugzilla/show_… and a QEMU bug lists.nongnu.org/archive/html/q…

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sinovoip's profile picture. banana pi open source hardware ,SBC,Rouer, IoT design ,STEAM education project.
Banana pi Open Source Hardware
 @sinovoip
Oct 17

Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi

sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
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WillFlux's profile picture. Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos, permacomputing 🦣 https://t.co/hoDeBTqKT0
Flux
 @WillFlux
Nov 7

If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…

WillFlux's tweet image. If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…
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kawaiicrypto's profile picture. 25 year old crypto trader. Super kawaii!! #DYOR always!
Kawaii Crypto
 @kawaiicrypto
13 h

XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing

kawaiicrypto's tweet image. XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing
kawaiicrypto's tweet image. XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing
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mips_riscv's profile picture. Advancing the next wave of Physical AI
MIPS
@mips_riscv
Nov 7

At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…

mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Sep 22

At #RISCVSummit North America 2025, DeepComputing Founder & CEO @Yuning_XC5 will share how we’re bringing intelligent media experiences to life on RISC-V AI SoCs. Join us to explore how RISC-V is redefining the way AI applications run at the edge and beyond. #RISCV…

DeepComputingio's tweet image. At #RISCVSummit North America 2025, DeepComputing Founder & CEO @Yuning_XC5 will share how we’re bringing intelligent media experiences to life on RISC-V AI SoCs. Join us to explore how RISC-V is redefining the way AI applications run at the edge and beyond. #RISCV…
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Goldenkrew3000's profile picture. Avery 21 Eng/한 🏳️‍⚧️
Goldenkrew3000
 @Goldenkrew3000
Nov 3

Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!

Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
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mips_riscv's profile picture. Advancing the next wave of Physical AI
MIPS
@mips_riscv
Nov 5

MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…

mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Nov 8

Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource

DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
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popovicu94's profile picture. Staff Software Engineer at Google Cloud, Applied AI | Linux and embedded systems by night | Efficient solutions to problems at every level of the tech stack
Uros Popovic
@popovicu94
Oct 21

I've just run into the image below. It seems to somehow formally describe RV32I ISA. What language is this and what is it used for? #RISCV

popovicu94's tweet image. I've just run into the image below. It seems to somehow formally describe RV32I ISA. What language is this and what is it used for? #RISCV
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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Oct 20

Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!

DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
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NickBrownHPC's profile picture. Senior Research Fellow @EPCCed, University of Edinburgh. Interested in novel architectures, HPC, FPGAs, RISC-V, programming language design and LLVM & MLIR.
Nick Brown
 @NickBrownHPC
Oct 22

Great talk by Jing Yang from XuanTie at @risc_v #Summit. The C930, providing RVA23, sounds very exciting. XuanTie cores have been crucial for #hpc in #riscv and in @EPCCed benchmarking has helped understand where the ecosystem is for #hpc and future opportunities

NickBrownHPC's tweet image. Great talk by Jing Yang from XuanTie at @risc_v #Summit. The C930, providing RVA23, sounds very exciting. XuanTie cores have been crucial for #hpc in #riscv and in @EPCCed benchmarking has helped understand where the ecosystem is for #hpc and future opportunities
NickBrownHPC's tweet image. Great talk by Jing Yang from XuanTie at @risc_v #Summit. The C930, providing RVA23, sounds very exciting. XuanTie cores have been crucial for #hpc in #riscv and in @EPCCed benchmarking has helped understand where the ecosystem is for #hpc and future opportunities
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SiFive's profile picture. As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute. With SiFive, RISC-V has no limits!
SiFive
 @SiFive
Oct 10

Come see us at the Summit, just a week away. We've got some exciting demos and our team will be there to answer questions. #riscv.

SiFive's tweet image. Come see us at the Summit, just a week away. We've got some exciting demos and our team will be there to answer questions. #riscv.
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sinovoip's profile picture. banana pi open source hardware ,SBC,Rouer, IoT design ,STEAM education project.
Banana pi Open Source Hardware
 @sinovoip
Sep 29

Banana Pi BPI-F3 SBC , 8 Core RISC-V SpacemiT K1, 2Tops of Fused Performance for Versatile Computing,2/4/8/16G RAM and 8-128G eMMC docs.banana-pi.org/en/BPI-F3/Bana… #riscv #SBC #opensource #AI #AIoT #NAS #robotics #edgecomputing

sinovoip's tweet image. Banana Pi BPI-F3 SBC , 8 Core RISC-V SpacemiT K1, 2Tops of Fused Performance for Versatile Computing,2/4/8/16G RAM and 8-128G eMMC docs.banana-pi.org/en/BPI-F3/Bana… #riscv #SBC #opensource #AI #AIoT #NAS #robotics #edgecomputing
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NickBrownHPC's profile picture. Senior Research Fellow @EPCCed, University of Edinburgh. Interested in novel architectures, HPC, FPGAs, RISC-V, programming language design and LLVM & MLIR.
Nick Brown
 @NickBrownHPC
Oct 24

The dev zone at #RISCVSummit was crammed full of interesting things and very popular this week, here I chat to Austin @risc_v about the #HPC #RISCV demo we had brought from @EPCCed . Thanks to Carl for providing the hardware and installing things!

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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Oct 31

The future of intelligent media is open — and RISC-V is stepping into that future. At @VideoLan Developer Days, @Yuning_XC5 will show VLC running with STT and T2T on our 40-TOPS RISC-V laptop. Come see RISC-V in action. The open media era starts here. #RISCV #VLC #OpenHardware

DeepComputingio's tweet image. The future of intelligent media is open — and RISC-V is stepping into that future. At @VideoLan Developer Days, @Yuning_XC5 will show VLC running with STT and T2T on our 40-TOPS RISC-V laptop. Come see RISC-V in action. The open media era starts here. #RISCV #VLC #OpenHardware
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splinedrive's profile picture. BMX rider | Embedded Software engineer. Hobbyist chip/FPGA—OS-capable RISC-V SoCs (since ’21). Linux/xv6. TU Berlin.
logic destroyer
 @splinedrive
Sep 15

Bruh 2.6.17-rc6 mainline linux #KianV #RISCV #CRAP

splinedrive's tweet image. Bruh 2.6.17-rc6 mainline linux #KianV #RISCV #CRAP
splinedrive's profile picture. BMX rider | Embedded Software engineer. Hobbyist chip/FPGA—OS-capable RISC-V SoCs (since ’21). Linux/xv6. TU Berlin.
logic destroyer
 @splinedrive
Sep 15

Do you want to see the KianV SoC running Linux kernel 2.6.17-rc6 today?

Yeah %94.4
No %5.6

36 vote · Final results

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kawaiicrypto's profile picture. 25 year old crypto trader. Super kawaii!! #DYOR always!
Kawaii Crypto
 @kawaiicrypto
13 h

XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing

kawaiicrypto's tweet image. XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing
kawaiicrypto's tweet image. XMRIG ON #RISCV! I dare say, at this point, I run the smollest #Monero miner at 22.86x35.56mm! Powered directly on the PCB so the USB-C port is available for flash storage to act as swap (4-5x faster than the micro SD card). I used @MoneroOcean for testing
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yama23238's profile picture. 趣味は電子工作です 電子工作のツイートをしていきたいと思います
yama
 @yama23238
21 h

VisionFive2liteが通関手続きを終えて、国際交換局から発送になってる 明日あたり届くのかな? #visionfive2 #riscv

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QUANTUMpoland's profile picture. TWÓJ PARTNER W WYMAGAJĄCYCH PROJEKTACH 𝗭𝗔𝗣𝗥𝗔𝗦𝗭𝗔𝗠𝗬 𝗗𝗢 𝗞𝗢𝗡𝗧𝗔𝗞𝗧𝗨: 𝖨𝖭𝖥𝖮@𝖰𝖴𝖠𝖭𝖳𝖴𝖬.𝖢𝖮𝖬.𝖯𝖫
𝗤𝗨𝗔𝗡𝗧𝗨𝗠 𝗧𝗲𝗰𝗵𝗻𝗼𝗹𝗼𝗴𝘆 𝗧𝗿𝗮𝗻𝘀𝗳𝗲𝗿 𝗖𝗼𝗿𝗽𝗼𝗿𝗮𝘁𝗶𝗼𝗻
 @QUANTUMpoland
Nov 10

Firmy #LAUTERBACH i @tenstorrent ogłaszają strategiczną współpracę nad rozwojem motoryzacyjnych układów #RISCV SoC, które wyznaczą nowy standard w branży! To połączenie mocy, elastyczności i innowacji – idealne dla ery #SDV. 👉 tiny.pl/xx-3y6fz #embedded #automotive #SoC

QUANTUMpoland's tweet image. Firmy #LAUTERBACH i @tenstorrent ogłaszają strategiczną współpracę nad rozwojem motoryzacyjnych układów #RISCV SoC, które wyznaczą nowy standard w branży! To połączenie mocy, elastyczności i innowacji – idealne dla ery #SDV. 👉 tiny.pl/xx-3y6fz #embedded #automotive #SoC
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mytechnotalent's profile picture. Author of the world’s most popular Reverse Engineering Tutorial
Kevin Thomas
 @mytechnotalent
Nov 9

Just finished writing a bare-metal #RISCV SG90 servo motor driver with an ESP32-C3 entirely in Assembler. I will be releasing it soon for others to learn from and expand their Embedded #ReverseEngineering skills for this incredible open-source platform.

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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Nov 8

Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource

DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
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ngKalbarczyk's profile picture. Google Developer Expert, Developer Avocado 🥑, Angular lover, software developer, author, speaker, @ngPolandConf & @jsPolandConf conference organizer.
Dariusz Kalbarczyk
 @ngKalbarczyk
Nov 8

New episode of the AI Master Podcast is out! 🎧 Guest: Christian Stenzel, Director of Sales EMEA at @tenstorrent We talk about open AI hardware, RISC-V, chiplets, and the future of silicon. Listen on your favorite platform! #AIMasterPodcast #AI #RISCv #Tenstorrent #OpenHardware

ngKalbarczyk's tweet image. New episode of the AI Master Podcast is out! 🎧 Guest: Christian Stenzel, Director of Sales EMEA at @tenstorrent We talk about open AI hardware, RISC-V, chiplets, and the future of silicon. Listen on your favorite platform! #AIMasterPodcast #AI #RISCv #Tenstorrent #OpenHardware
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m_z_k's profile picture. ＭＺＫとかいうプログラマですが、伺か?／乗り鉄,ニコ動,伺か,Scala,C++,Ruby,Linux,gentoo,東方,MSX,萌4ｺﾏ,漫画,どみる,アニメ,ThinkPad,英字ｷｰﾎﾞｰﾄﾞ,2ch,boost,Lisp,Haskell,H8,Z80,SH,ARM,Jaxa,ISAS,gcc ...
ＭＺＫなのです！（C107委託予定）＠大湊警備府💉💉💉💉
 @m_z_k
Nov 7

C107は落ちましたので例によって@tceoo1さんの所に 委託の予定です。 新作は以下の2点+αのとなる予定です。 ・DTMFデコーダIC 改 ・低ピン数スイッチマトリクス読取回路基板(仮) 　with RISC-V命令デコード表示ファームウェア (・拙作の技術解説ペーパーorコピー本) #C107 #riscv

m_z_k's tweet image. C107は落ちましたので例によって@tceoo1さんの所に 委託の予定です。 新作は以下の2点+αのとなる予定です。 ・DTMFデコーダIC 改 ・低ピン数スイッチマトリクス読取回路基板(仮) 　with RISC-V命令デコード表示ファームウェア (・拙作の技術解説ペーパーorコピー本) #C107 #riscv
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WillFlux's profile picture. Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos, permacomputing 🦣 https://t.co/hoDeBTqKT0
Flux
 @WillFlux
Nov 7

Compiler Explorer is a great way to understand the effect of #riscv extensions or compare CPU arch. You can even compare rv32 and armv7 to a 486. 🤔 For example, an endian swap takes 11 instructions with the base RISC-V ISA, but only 1 instruction (rev8) with the Zbb extension.

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WillFlux's profile picture. Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos, permacomputing 🦣 https://t.co/hoDeBTqKT0
Flux
 @WillFlux
Nov 7

If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…

WillFlux's tweet image. If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…
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tekkamanninja's profile picture. Love Linux forever!!!
Tekkaman Ninja
 @tekkamanninja
Nov 7

📢 RISC-V Open Hours 🗓️ Thu, Nov 13, 11:00 AM – 12:00 PM (GMT+8) 🔗 Event: community.riscv.org/events/details… ✨ Community forum beyond mailing lists ✨ Focus on RISC-V in open source projects & dev boards ✨ Updates, tech topics & new ecosystem highlights 🚀 #RISCV #RVOH @risc_v

tekkamanninja's tweet card. Virtual Event - RISC-V Open Hours provides the opportunity for the community to interact outside of the bounds of mailing lists, with a particular focus on RISC-V support in open source software...
RISC-V Open Hours
Source: community.riscv.org
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antonblanchard's profile picture. Fellow @tenstorrent. Opinions are my own.
Anton Blanchard
 @antonblanchard
Nov 7

Green screen #DOOM ! This was my favourite bug we found running DOOM on the @Tenstorrent Ascalon #RISCV CPU in pre silicon testing. We initially thought it was a chip RTL issue, but it turned out to be both a gcc bug gcc.gnu.org/bugzilla/show_… and a QEMU bug lists.nongnu.org/archive/html/q…

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mips_riscv's profile picture. Advancing the next wave of Physical AI
MIPS
@mips_riscv
Nov 7

At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…

mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
mips_riscv's tweet image. At Embedded World, Mark Throndson spoke on “Networking Native RISC-V Processor for the Datacenter,” discussing several optimizations that can be achieved within a standard #RISCV solution that tailor the implementation to networking. He highlighted the multi-threaded,…
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biagiocosenza's profile picture. Computer Science Professor at @UniSalerno, formerly @TUBerlin and @uniinnsbruck, visited @Uni_Stuttgart 🇪🇺
Biagio Cosenza
 @biagiocosenza
Nov 6

📄A Performance Analysis of Autovectorization on RVV RISC-V Boards Lorenzo Carpentieri, Mohammad Vazirpanah, Biagio Cosenza Euromicro International Conference on Parallel, Distributed and Network-based Processing (𝐏𝐃𝐏), 2025 #RISCV

biagiocosenza's tweet image. 📄A Performance Analysis of Autovectorization on RVV RISC-V Boards Lorenzo Carpentieri, Mohammad Vazirpanah, Biagio Cosenza Euromicro International Conference on Parallel, Distributed and Network-based Processing (𝐏𝐃𝐏), 2025 #RISCV
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NickBrownHPC's profile picture. Senior Research Fellow @EPCCed, University of Edinburgh. Interested in novel architectures, HPC, FPGAs, RISC-V, programming language design and LLVM & MLIR.
Nick Brown
 @NickBrownHPC
Nov 6

Thanks @risc_v for the invite to give a keynote at #RISCVSummit a couple of weeks ago. We have seen great progress in #RISCV for #HPC, and given promises by vendors and progress in the sw ecosystem I predict that 2026 could be a watershed year. youtu.be/ItA-NS4vxsU?si…

NickBrownHPC's tweet card. Keynote: Reimagining the Future of High Performance Computing...

youtube.com

YouTube

Keynote: Reimagining the Future of High Performance Computing...

Source: youtube.com
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AltafHu04354071's profile picture. Still learning
Altaf Hussain
 @AltafHu04354071
Nov 6

💡 Every AtlasChip carries a blockchain identity — making technology transparent, traceable, and trustworthy. Investment link 👇 sidrastart.com/project/3f4e7b… #AtlasChipWeb3 #RISCv #SmartTech #HalalFinance

AltafHu04354071's tweet image. 💡 Every AtlasChip carries a blockchain identity — making technology transparent, traceable, and trustworthy. Investment link 👇 sidrastart.com/project/3f4e7b… #AtlasChipWeb3 #RISCv #SmartTech #HalalFinance
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lcheylus's profile picture. Mastodon: @lcheylus@bsd.network Cybersecurity Linux BSD - Lyon addict Tweets in French and English
Laurent Cheylus
 @lcheylus
Nov 6

How to setup an OpenBSD RISCV64 Virtual Machine in QEMU - Post by Hiltjo Posthuma #OpenBSD #RiscV codemadness.org/openbsd-riscv6…

lcheylus's tweet image. How to setup an OpenBSD RISCV64 Virtual Machine in QEMU - Post by Hiltjo Posthuma #OpenBSD #RiscV codemadness.org/openbsd-riscv6…
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mips_riscv's profile picture. Advancing the next wave of Physical AI
MIPS
@mips_riscv
Nov 5

MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…

mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
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sinovoip's profile picture. banana pi open source hardware ,SBC,Rouer, IoT design ,STEAM education project.
Banana pi Open Source Hardware
 @sinovoip
Oct 17

Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi

sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
sinovoip's tweet image. Banana Pi BPI-CM6 design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI computing power. 8/16G DDR and 8/16/32/128G eMMC. support DeepX AI. will comming soon. docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #EdgeComputing #bananapi #raspberrypi
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popovicu94's profile picture. Staff Software Engineer at Google Cloud, Applied AI | Linux and embedded systems by night | Efficient solutions to problems at every level of the tech stack
Uros Popovic
@popovicu94
May 17

Machines build machines - AI creates a bootable VM: popovicu.com/posts/ai-creat… I successfully managed to build a bootable #RISCV VM almost entirely with #AI. It boots #OpenSBI, paving the way to boot #Linux. How far can we push the AI? #FPGA implementation next?

popovicu94's tweet image. Machines build machines - AI creates a bootable VM: popovicu.com/posts/ai-creat… I successfully managed to build a bootable #RISCV VM almost entirely with #AI. It boots #OpenSBI, paving the way to boot #Linux. How far can we push the AI? #FPGA implementation next?
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MilkV_Official's profile picture. We are an AIoT company composed of passionate RISC-V enthusiasts driving the advancement of RISC-V technology.
Milk-V
 @MilkV_Official
Jan 16

To all supporters of Milk-V Oasis #riscv #sg2380 @AraceTech

MilkV_Official's tweet image. To all supporters of Milk-V Oasis #riscv #sg2380 @AraceTech
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MilkV_Official's profile picture. We are an AIoT company composed of passionate RISC-V enthusiasts driving the advancement of RISC-V technology.
Milk-V
 @MilkV_Official
Jul 15

🚀 We’re back with the ultimate RISC-V MINI ITX - Milk-V Titan! Powered by UltraRISC UR-DP1000, the most powerful RISC-V CPU in production yet! Supports UEFI boot & plug-and-play high-end GPUs. PRE-ORDER Now! Get $50 off for just $5 on Arace.tech🔥#riscv #ultrarisc

MilkV_Official's tweet image. 🚀 We’re back with the ultimate RISC-V MINI ITX - Milk-V Titan! Powered by UltraRISC UR-DP1000, the most powerful RISC-V CPU in production yet! Supports UEFI boot & plug-and-play high-end GPUs. PRE-ORDER Now! Get $50 off for just $5 on Arace.tech🔥#riscv #ultrarisc
MilkV_Official's tweet image. 🚀 We’re back with the ultimate RISC-V MINI ITX - Milk-V Titan! Powered by UltraRISC UR-DP1000, the most powerful RISC-V CPU in production yet! Supports UEFI boot & plug-and-play high-end GPUs. PRE-ORDER Now! Get $50 off for just $5 on Arace.tech🔥#riscv #ultrarisc
MilkV_Official's tweet image. 🚀 We’re back with the ultimate RISC-V MINI ITX - Milk-V Titan! Powered by UltraRISC UR-DP1000, the most powerful RISC-V CPU in production yet! Supports UEFI boot & plug-and-play high-end GPUs. PRE-ORDER Now! Get $50 off for just $5 on Arace.tech🔥#riscv #ultrarisc
MilkV_Official's tweet image. 🚀 We’re back with the ultimate RISC-V MINI ITX - Milk-V Titan! Powered by UltraRISC UR-DP1000, the most powerful RISC-V CPU in production yet! Supports UEFI boot & plug-and-play high-end GPUs. PRE-ORDER Now! Get $50 off for just $5 on Arace.tech🔥#riscv #ultrarisc
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MilkV_Official's profile picture. We are an AIoT company composed of passionate RISC-V enthusiasts driving the advancement of RISC-V technology.
Milk-V
 @MilkV_Official
Aug 8

🚀 Milk-V Titan Update More features, same price! Our BMC is now fully upgraded and built right into Titan — no extra module needed. ✅ Remote power control ✅ Real-time load & status monitoring Learn more👉: milkv.io/titan #RISCV

MilkV_Official's tweet image. 🚀 Milk-V Titan Update More features, same price! Our BMC is now fully upgraded and built right into Titan — no extra module needed. ✅ Remote power control ✅ Real-time load & status monitoring Learn more👉: milkv.io/titan #RISCV
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sinovoip's profile picture. banana pi open source hardware ,SBC,Rouer, IoT design ,STEAM education project.
Banana pi Open Source Hardware
 @sinovoip
Apr 11

Banana Pi BPI-CM6 SpacemiT K1 8 core RISC-V board with Deepx for AI Edge Computing Gateway docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #deepx #SpacemiT #ai #edgecomputer #bananapi #raspberrypi #orangepi

sinovoip's tweet image. Banana Pi BPI-CM6 SpacemiT K1 8 core RISC-V board with Deepx for AI Edge Computing Gateway docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #deepx #SpacemiT #ai #edgecomputer #bananapi #raspberrypi #orangepi
sinovoip's tweet image. Banana Pi BPI-CM6 SpacemiT K1 8 core RISC-V board with Deepx for AI Edge Computing Gateway docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #deepx #SpacemiT #ai #edgecomputer #bananapi #raspberrypi #orangepi
sinovoip's tweet image. Banana Pi BPI-CM6 SpacemiT K1 8 core RISC-V board with Deepx for AI Edge Computing Gateway docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #deepx #SpacemiT #ai #edgecomputer #bananapi #raspberrypi #orangepi
sinovoip's tweet image. Banana Pi BPI-CM6 SpacemiT K1 8 core RISC-V board with Deepx for AI Edge Computing Gateway docs.banana-pi.org/en/BPI-CM6/Ban… #riscv #deepx #SpacemiT #ai #edgecomputer #bananapi #raspberrypi #orangepi
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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Oct 20

Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!

DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
DeepComputingio's tweet image. Last day at @MakerFaireRome 2025 🇮🇹 Showed the RISC-V in action with @DeepComputingio DC-ROMA RISC-V AI PC inside the @FrameworkPuter Laptop. Excited to keep spreading the word about #RISCV #OpenSource, and #OpenHardware in Rome!
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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Nov 8

Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource

DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
DeepComputingio's tweet image. Excited to bring @DeepComputingio + @risc_v + @FrameworkPuter to @FOSS_for_All — sharing the power of open computing with the community! #RISCV #Opensource
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SipeedIO's profile picture. AIoT opensource hardware platform
Sipeed
@SipeedIO
Jul 18

Visiting RISC-V Submit China ! #RVSC More powerful RISCV chips coming out this year, 2 of them even outperforming the RK3588 ! #RISCV chip is catching up, just waiting for software ecosystem ...

SipeedIO's tweet image. Visiting RISC-V Submit China ! #RVSC More powerful RISCV chips coming out this year, 2 of them even outperforming the RK3588 ! #RISCV chip is catching up, just waiting for software ecosystem ...
SipeedIO's tweet image. Visiting RISC-V Submit China ! #RVSC More powerful RISCV chips coming out this year, 2 of them even outperforming the RK3588 ! #RISCV chip is catching up, just waiting for software ecosystem ...
SipeedIO's tweet image. Visiting RISC-V Submit China ! #RVSC More powerful RISCV chips coming out this year, 2 of them even outperforming the RK3588 ! #RISCV chip is catching up, just waiting for software ecosystem ...
SipeedIO's tweet image. Visiting RISC-V Submit China ! #RVSC More powerful RISCV chips coming out this year, 2 of them even outperforming the RK3588 ! #RISCV chip is catching up, just waiting for software ecosystem ...
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popovicu94's profile picture. Staff Software Engineer at Google Cloud, Applied AI | Linux and embedded systems by night | Efficient solutions to problems at every level of the tech stack
Uros Popovic
@popovicu94
Oct 21

I've just run into the image below. It seems to somehow formally describe RV32I ISA. What language is this and what is it used for? #RISCV

popovicu94's tweet image. I've just run into the image below. It seems to somehow formally describe RV32I ISA. What language is this and what is it used for? #RISCV
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mips_riscv's profile picture. Advancing the next wave of Physical AI
MIPS
@mips_riscv
Nov 5

MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…

mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
mips_riscv's tweet image. MIPS' Sean Murphy took the stage at Embedded World, sharing how MIPS is creating #RISCV custom instructions to accelerate real-rime applications. He unveiled a novel solution for accelerating real-time motor control algorithms using a MIPS defined trigonometric math custom…
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WillFlux's profile picture. Only hardware makes it possible! FPGA, RISC-V, 68K, OS, graphics, demos, permacomputing 🦣 https://t.co/hoDeBTqKT0
Flux
 @WillFlux
Nov 7

If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…

WillFlux's tweet image. If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-co…
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Goldenkrew3000's profile picture. Avery 21 Eng/한 🏳️‍⚧️
Goldenkrew3000
 @Goldenkrew3000
Nov 3

Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!

Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
Goldenkrew3000's tweet image. Oh yeah finally got the #milkv duo (256mb). Even came with a very useful SMD ruler (I needed one of those anyway). The #riscv adventures are going to be fun!!
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risc_v's profile picture. RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.
RISC-V International
@risc_v
Jul 18

Exciting news from #RISCVSummitChina, as Frans Sijstermans from NVIDIA announces CUDA is coming to RISC-V! This port will enable a RISC-V CPU to be the main application processor in a CUDA-based AI system. #RISCV #RISCVEverywhere

risc_v's tweet image. Exciting news from #RISCVSummitChina, as Frans Sijstermans from NVIDIA announces CUDA is coming to RISC-V! This port will enable a RISC-V CPU to be the main application processor in a CUDA-based AI system. #RISCV #RISCVEverywhere
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CrookedCKB's profile picture. $CKB freak, @nervosnation #NervosNetwork crypto or footy related is fine by me.
CrookedNervosness.bit
 @CrookedCKB
Jul 26

#Riscv $CKB #accountabstraction @Rypto__

CrookedCKB's tweet image. #Riscv $CKB #accountabstraction @Rypto__
wmhuo168's profile picture. Princeton, Intel's first Chief Representative in Beijing.
William Huo
 @wmhuo168
Jul 25

NVIDIA just bent the knee at the RISC-V Summit. CUDA now runs on the same architecture China is using to escape U.S. tech control. Here's why that should terrify Washington RISC-V’s Ascent Could Reshape The Global Compute Landscape share.google/1uysrSEflxhmhY…

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DeepComputingio's profile picture. Official account of DeepComputing. Turning RISC-V into Reality!
DeepComputing
@DeepComputingio
Sep 22

At #RISCVSummit North America 2025, DeepComputing Founder & CEO @Yuning_XC5 will share how we’re bringing intelligent media experiences to life on RISC-V AI SoCs. Join us to explore how RISC-V is redefining the way AI applications run at the edge and beyond. #RISCV…

DeepComputingio's tweet image. At #RISCVSummit North America 2025, DeepComputing Founder & CEO @Yuning_XC5 will share how we’re bringing intelligent media experiences to life on RISC-V AI SoCs. Join us to explore how RISC-V is redefining the way AI applications run at the edge and beyond. #RISCV…
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edutaboada's profile picture. Apasionado de la electronica y las nuevas tecnologias. Ingeniero y consultor de seguridad, sistemas y comunicaciones. Autor del libro Proxmox Curso Práctico
Eduardo Taboada
 @edutaboada
Oct 2, 2024

Pues hoy me ha llegado un juguete nuevo, a ver si lo pruebo a fondo, pero tiene muy buena pinta #nanoKVM, un KVM basado en un procesador #RISCV con un linux embebido . Y permite subir imágenes para arrancar desde CD/DVD. Aleeee al tajo!!!

edutaboada's tweet image. Pues hoy me ha llegado un juguete nuevo, a ver si lo pruebo a fondo, pero tiene muy buena pinta #nanoKVM, un KVM basado en un procesador #RISCV con un linux embebido . Y permite subir imágenes para arrancar desde CD/DVD. Aleeee al tajo!!!
edutaboada's tweet image. Pues hoy me ha llegado un juguete nuevo, a ver si lo pruebo a fondo, pero tiene muy buena pinta #nanoKVM, un KVM basado en un procesador #RISCV con un linux embebido . Y permite subir imágenes para arrancar desde CD/DVD. Aleeee al tajo!!!
edutaboada's tweet image. Pues hoy me ha llegado un juguete nuevo, a ver si lo pruebo a fondo, pero tiene muy buena pinta #nanoKVM, un KVM basado en un procesador #RISCV con un linux embebido . Y permite subir imágenes para arrancar desde CD/DVD. Aleeee al tajo!!!
edutaboada's tweet image. Pues hoy me ha llegado un juguete nuevo, a ver si lo pruebo a fondo, pero tiene muy buena pinta #nanoKVM, un KVM basado en un procesador #RISCV con un linux embebido . Y permite subir imágenes para arrancar desde CD/DVD. Aleeee al tajo!!!
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cnlohr's profile picture. Shaders, ♥ & Jesus
cnlohr
 @cnlohr
Feb 26

This couldn't have been a better commit number to switch from ch32v003fun to #ch32fun. Glad to be able to help serve the community surrounding everyone's favorite line of #RISCV microcontrollers. Thank you to all the contributors for getting this project to go the distance.

cnlohr's tweet image. This couldn't have been a better commit number to switch from ch32v003fun to #ch32fun. Glad to be able to help serve the community surrounding everyone's favorite line of #RISCV microcontrollers. Thank you to all the contributors for getting this project to go the distance.
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