Paradinight

@semicon_wiz

Amsterdam, The Netherlands

Joined November 2025

22Posts 4Followers 197Following

Paradinight reposted

U.S. Graphics Company

@usgraphics

21 h

Texas Elektronikgruppe, Inc. FLX-5024, 256 × 8 SRAM Silicon-on-Sapphire 28nm 2MRad/s Radiation Hardnening

Paradinight reposted

Taiwan is a merchant state, and it’s interesting to draw the historical comparison to medieval Venice - perhaps the most successful merchant state in history. A little post-turkey history lesson: For about 300 years (from 1300 to 1600), Venice (more specifically Murano) had an…

Citrini7's tweet image. Taiwan is a merchant state, and it’s interesting to draw the historical comparison to medieval Venice - perhaps the most successful merchant state in history. A little post-turkey history lesson:

For about 300 years (from 1300 to 1600), Venice (more specifically Murano) had an…

bubble boi

@bubbleboi

Nov 27

Next level sad… this is a semiconductor researcher not a fucking cartel member. TSMC knows they are going to be losing process leadership and are desperate to do anything to stop it. Completely crosses all lines of normality, people change jobs all the time what are you going…

Paradinight reposted

Ray Wang

@rwang07

Nov 28

In its latest Value Up Corporate Report released today, SK Hynix indicated plans to adopt hybrid bonding technology for HBM products exceeding 20 layers by 2029.

rwang07's tweet image. In its latest Value Up Corporate Report released today, SK Hynix indicated plans to adopt hybrid bonding technology for HBM products exceeding 20 layers by 2029.

Paradinight reposted

TechPowerUp

@TechPowerUp

Nov 27

Intel Sees 5,000 W GPUs Possible with Integrated Voltage Regulators tpu.me/jdbb

Paradinight reposted

Fred Chen

@DrFrederickChen

Nov 27

The internal bandwidth of monolithic 3D DRAM is much higher than HBM because TSVs occupy substantial area on both the logic base die and DRAM dies, limiting how many vertical connections can be provisioned and thereby capping internal bandwidth. dl.acm.org/doi/10.1145/37…

Paradinight

@semicon_wiz

Nov 25

This work from last year argues for related scheme using MRAM as main memory. It divides the MRAM memory into short retention and long retention slices, and uses the TLB to decide which slice to use to service each virtual address.

semicon_wiz's tweet image. This work from last year argues for related scheme using MRAM as main memory. It divides the MRAM memory into short retention and long retention slices, and uses the TLB to decide which slice to use to service each virtual address.

Paradinight

@semicon_wiz

Nov 25

Very interesting paper by Microsoft Research. They argue that emerging memory technologies do not need non-volatility to out-compete HBM. The software/hardware can play around their limited retention time instead.

semicon_wiz's tweet image. Very interesting paper by Microsoft Research. They argue that emerging memory technologies do not need non-volatility to out-compete HBM. The software/hardware can play around their limited retention time instead.

Paradinight

@semicon_wiz

Nov 25

Interesting talk by Dong Hyuk Woo from Samsung at IBM think lab November 2025. Spoke about the inefficiencies of HBM and CoWoS for AI applications, and the need to customize the memory and 3D stack.