RISC-V in Space Workshop at ESTEC has begun. Roland Weigand and colleagues from @esa are arranging this event dedicated to the application in space of the @risc_v instruction set architecture. We at @CAES_Adv_Elec support this event and offer the space market our IP cores. #riscv
This is true on both sides of the Atlantic: youtu.be/HwGw2TrRJh4 microelectronics.esa.int/riscv/rvws2022…
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YouTube
GR765 Development Status
RISC-V heads to the stars! More details on @sifive @risc_v cores being selected by NASA for future missions: businesswire.com/news/home/2022… #riscv
Lots of interesting content from the GR740 user day available at gr740.space - including a video of the fifth generation European space grade MPSoC youtu.be/HwGw2TrRJh4 #soc #riscv #sparc
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YouTube
GR765 Development Status
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