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Latest news: Geopolitical hijinks: export controls, rare earths, and blacklists; #SEMICONWest announcement blitz; Intel readies 18A; AMD-OpenAI 6 GW deal; new 300mm GaN program; fab spending & EDA reports; acquisitions. semiengineering.com/chip-industry-… #semiconductor #semiEDA #technology
Semiconductor Engineering has over 500 Tech Talk videos to learn from youtube.com/user/SperlingM… Hot topics included challenges involving chiplets and heterogeneous integration, AI, data management, DRAM, manufacturing and test, and much more #semiconductor #techtalks #semiEDA #AI
Location verification is gaining traction as a way of strengthening supply chain oversight with minimal effort, fueled by tightening export controls and growing concerns about AI chip smuggling and counterfeiting. semiengineering.com/location-verif… #semiconductor #locationverification
How 3D-IC Will Change Chip Design semiengineering.com/how-3d-ic-will… Stacking dies will dramatically improve performance, but it’s still a work in progress. Final in series. #3DIC #chiplets #semiconductor @Movellus @Keysight @Synopsys @Cadence @siemenssoftware
Smarter Packaging: How AI is Reshaping Assembly and Materials Control semiengineering.com/smarter-packag… From predictive maintenance to excursion monitoring, AI is redefining yield management in multi-die assembly. #semiconductor #advancedpackaging #AI
The third quarter of 2025 was dominated by massive rounds, with 75 companies raising $6 billion. semiengineering.com/startup-fundin… #semiconductor #startups #startupfunding #technology
Latest: OpenAI DRAM capacity deals in Korea; $4.4B IC equipment merger; Taiwan says no 50-50; EU Chips Act revision; Meta buys RISC-V startup; foundry report; imec; NIST disses DeepSeek; China’s litho; H1B weighted system... semiengineering.com/chip-industry-… #semiconductor #VLSI #RISCV
5 experts discuss how to cool 3D-ICs: Tool chains need improvement as chipmakers begin stacking AI chips, increasing the thermal density and unpredictability over time semiengineering.com/how-to-cool-3d… #3DIC #chiplet #semiconductor @Movellus @siemenssoftware @Synopsys @Cadence @Keysight
Latest: OpenAI DRAM capacity deals in Korea; $4.4B IC equipment merger; Taiwan says no 50-50; EU Chips Act revision; Meta buys RISC-V startup; foundry report; imec; NIST disses DeepSeek; China’s litho; H1B weighted system... semiengineering.com/chip-industry-… #semiconductor #technology
Power density is stressing board-level power delivery. semiengineering.com/voltage-regula… #powerdelivery #semiconductor #voltageregulator
The Limits Of AI’s Role In EDA Tools: AI is a set of algorithms capable of solving problems. But how relevant are they to the tasks that EDA performs? semiengineering.com/the-limits-of-… #semiEDA #AI #AgenticAI #VLSI #chipdesign
Special report-->Glass Substrates Gain Momentum: Benefits increase with package size, but not all the kinks have been worked out semiengineering.com/glass-substrat… #semiconductor #glasssubstrates
Higher frequencies bring more complexity to every part of the network, from tiny antennas to powerful base station processors. semiengineering.com/new-antennas-a… #6G #wireless #semiconductor #edge #antennas
Special Report: A 94-page research report on interconnect fundamentals for semiconductor engineers. semiengineering.com/on-die-and-in-… #semiconductor #interconnects
An expanding supply chain of dies feeding multi-die products is prompting chipmakers to reassess and expand on ways to instill trust from end to end. semiengineering.com/infusing-trust… #semiconductor #supplychain #traceability #ATE
Combating the Memory Walls: Optimization Pathways for Long-Context Agentic LLM Inference (@Cambridge_Uni , @imperialcollege et al.) semiengineering.com/hw-sw-co-desig… #AgenticAI #LLM #inferencing
The chip industry traditionally has relied on margins to help them mitigate timing problems, but an increasing array of factors are now influencing timing. Can static timing analysis evolve to address these problems? semiengineering.com/the-demise-of-… #verification #semiconductor
Latest news: site licenses for chip equip; HBM4; Natcast layoffs; ASML’s big AI $; Arteris CEO on data movement in the AI age; Intel’s leadership; AI data center risks; MLPerf; DRAM drilldown; big shifts in memory hierarchy... semiengineering.com/chip-industry-… #semiconductor #semiEDA #AI
Contact resistance, or CRES, is one of those problems that most engineers prefer not to think about until it’s staring them in the face. semiengineering.com/the-hidden-cos… #semiconductor #CRES #ContactResistance #yield
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