#openfpgaloader search results

Well, to the authors of #openFPGALoader😂, I can only add the ability to program this board in #Yosys #nextpnr and #apicula.😉 I don't think it will take much time, I just need it to appear on Asian marketplaces so I can buy it.😆

New "toy" recently arrived: @ArrowGlobal AXE5000 with @AlteraFPGA_ Agilex 5 — thanks @fpgahelper! Now: - Adding #openFPGALoader support - Adding board to @enjoy_digital LiteX First task: Where’s the JTAG programming instructions/sequences for Agilex 5? 🤔

Another #openFPGALoader update: - Added @latticesemi ECP3 (SRAM-only) support (thx M. Traxler/GSI & M. Boehmer/TUM for the board) - Added SSPI for @latticesemi ECP5 (thx @YSionneau for spotting it) - Added sponsor section — thanks everyone!

@GwenhaelG And once again, thank you for your wonderful #openFPGALoader tool—without it, I would die.

Where would we be without #OpenFPGALoader? I think we would still be in the Stone Age. Thank you very much, @GwenhaelG github.com/trabucayre/ope…

😒😒😒 damned flash thingy 😝 #tangnano20k #openfpgaloader

seriously... just 30 mins later after flashing some sample bit streams I've bricked somehow the #tangnano20k using #openfpgaloader from @GwenhaelG 😅🤷‍♂️ (any tips?) "... --detect" still works but programming the flash rom results to "unknown flash" 🫣😱

Another news: @GOWIN_SEMI GWU2X (USB/JTAG only) is now supported by #openFPGALoader. lilygo T-FPGA (@GOWIN_SEMI GW1NSR-4C) too!

Needs to know @AMDembedded FPGA health/state? Now #openFPGALoader is able to readback/decode status and ctrl1 registers (when loads fails or at any time)! Thanks @colinoflynn / @newaetech for funding/sponsoring this new feature!🎇🎉 github.com/trabucayre/ope…

#openFPGALoader release v0.12.0! 🎇 Most notable evolutions: - @GOWIN_SEMI GW5A (@SipeedIO tangPrimer25k, tangMega138k) - better @latticesemi Nexus support, @colognechip improvements - webAssembly support - @AMDembedded XADC/DNA - JTAG chain fix

Loading FPGAs on a budget. The openFPGALoader project supports a wide variety of adapters. Let's review a few of the more cost-effective options for a stand alone programmer. #opensource #FPGA #openfpgaloader

Played a bit with my @SipeedIO tang Primer 25k: - @enjoy_digital support: ✅ - #openFPGALoader: load ✅ flash: WIP

Received these two beautiful boards ! 🥳 - @SipeedIO Tang Mega 138K (@GOWIN_SEMI GW5A-AST-138) - @SipeedIO Tang Primer 25k (@GOWIN_SEMI GW5A-25A) Thanks @SipeedIO !!! 🥂 Time to play / work on #openFPGALoader and @enjoy_digital LiteX 😀

Hooray! I took the #tangnano20 k board donated by Sipeed in the city. 😀 #openFPGAloader is really not very friendly with this, but it will be solved one way or another

#openFPGALoader release v0.11.0! 🎇 Most notable evolutions: - @sipeed tangNano20k, STLV7325, KCU116, ... - remote_bitbang, wch CH347, libgpiod v2 support - virtex ultrascale+ - @efinixinc SPI access (Jtag) - new SPI flash and JTAG<->SPI bridges

#openFPGALoader v0.10.0 has just been released. 🎆 Most notable evolutions: - 4 new Digilent boards - VCU118 support - LiteX-Acorn-Baseboards - EttusResearch X300/X310 - SVF player is device independant - fix path for msys2 - many others fixes and improvements

Thanks to @_JCLL's feedback: @DigilentInc nexys A7 50/100 are now officially supported by #openFPGALoader (RAM and Flash) 🎉 github.com/trabucayre/ope…

#openFPGALoader v0.9.1 has just been released.Minor maintenance: Fix pin offset for FDI's bitbang (introduces by libgpiod support, affecting @RadionaOrg #ulx3s) Adding @GOWIN_SEMI MSPI (GW2A -> @SipeedIO tangPrimer20K) 60x faster than bitbanging. see: github.com/trabucayre/ope…

Small #openFPGALoader's update: now MSPI is supported for @GOWIN_SEMI GW2A: - before: writing a bitstream took ~10min - now: time openFPGALoader -f top.fs real 0m9,636s user 0m0,757s sys 0m1,243s I think It's correct for a draft 🥳

I have received this tang Primer 20K + dock lite + Jtag adapter the last week! Thanks a lot @SipeedIO for the gift! Started to play with it (using @enjoy_digital LiteX) and improve #openFPGALoader @GOWIN_SEMI GW2A support. Seems CRC are differents than GW1 devices

Some improvements to #openFPGALoader

🎅is passed! I've received my @RadionaOrg ULX3S 🎉🥂 Tested with @oe1cxw #picosoc: easy! And of course #openFPGALoader works perfectly 🥳

Happy to have oportunity to contribute! I have tested @pepijndevos #apicula nanolcd (targeted for @SipeedIO #tangNano) example and It's works (build on my computer, loaded with #openFPGALoader through RPI3 with a fresh @buildrootorg image)

Played a bit with my @SipeedIO tang Primer 25k: - @enjoy_digital support: ✅ - #openFPGALoader: load ✅ flash: WIP

New device in #openFPGALoader: the @latticesemi Nexus. Some improvement required to write into flash (works with some limitations).🥳 Tested with the crosslink-NX Evn board and @sylefeb Silice (@DigilentInc pmodVGA) github.com/trabucayre/Sil…

Loading FPGAs on a budget. The openFPGALoader project supports a wide variety of adapters. Let's review a few of the more cost-effective options for a stand alone programmer. #opensource #FPGA #openfpgaloader

Received these two beautiful boards ! 🥳 - @SipeedIO Tang Mega 138K (@GOWIN_SEMI GW5A-AST-138) - @SipeedIO Tang Primer 25k (@GOWIN_SEMI GW5A-25A) Thanks @SipeedIO !!! 🥂 Time to play / work on #openFPGALoader and @enjoy_digital LiteX 😀

New "toy" recently arrived: @ArrowGlobal AXE5000 with @AlteraFPGA_ Agilex 5 — thanks @fpgahelper! Now: - Adding #openFPGALoader support - Adding board to @enjoy_digital LiteX First task: Where’s the JTAG programming instructions/sequences for Agilex 5? 🤔

I have received this tang Primer 20K + dock lite + Jtag adapter the last week! Thanks a lot @SipeedIO for the gift! Started to play with it (using @enjoy_digital LiteX) and improve #openFPGALoader @GOWIN_SEMI GW2A support. Seems CRC are differents than GW1 devices

With Baptiste Gouraud, we have added @XilinxInc Zynq Ultrascale+ MPSoC support in #openFPGALoader 🥳 I have received just in time this Alinx AXU2CGA (xczu2cg) (Thanks Jean Burgat!) 🎉

adapted @WillFlux fpga-ad-astra and fpga-pong to @SipeedIO lichee tang (@anlogic eagle s20). 😀 This use #yosys for synthesize and #openFPGALoader to load bitstream. See github.com/projf/projf-ex… and github.com/trabucayre/pro…

Hooray! I took the #tangnano20 k board donated by Sipeed in the city. 😀 #openFPGAloader is really not very friendly with this, but it will be solved one way or another

adapted (again) @WillFlux fpga-ad-astra to @seeedstudio spartanEdgeAccelerator (@XilinxInc spartan7). I've re-used my "old" DVI implementation. 🥳 This use #yosys for synthesize and #openFPGALoader to load bitstream.

Another #openFPGALoader update: - Added @latticesemi ECP3 (SRAM-only) support (thx M. Traxler/GSI & M. Boehmer/TUM for the board) - Added SSPI for @latticesemi ECP5 (thx @YSionneau for spotting it) - Added sponsor section — thanks everyone!

Just got hold of a @LambdaConcept ECPIX-5. First time using the open-source toolchain #Yosys + #Nextpnr, first time using #openFPGALoader, and first time ever using a @latticesemi FPGA. LEDs already flashing. 1hr start to finish - and no 10GB Xilinx downloads required 😀 Love it!

Thanks to @GwenhaelG #ULX3S can also be programmed with #openFPGALoader @ReneRebeTM

Needs to know @AMDembedded FPGA health/state? Now #openFPGALoader is able to readback/decode status and ctrl1 registers (when loads fails or at any time)! Thanks @colinoflynn / @newaetech for funding/sponsoring this new feature!🎇🎉 github.com/trabucayre/ope…

😒😒😒 damned flash thingy 😝 #tangnano20k #openfpgaloader

I finally got around to loading the PicoSoc demo onto the @SipeedIO Tang Nano9k board. The repo github.com/sipeed/TangNan… has a prebuilt bitstream. I used #openFPGALoader (github.com/trabucayre/ope…) to put it on the board.